Design of an insulated cavity

ABSTRACT

The invention relates to a method for connecting a connecting surface of a first silicon wafer [WA 1 ] with a connecting surface of a second silicon wafer [WA 2 ] so as to form an insulated cavity after assembly, at least one of the two silicon wafers [WA] including at least one functional area [DA] intended to be within the cavity. The method according to the invention includes a step [PLTS] of depositing alloy soldering bumps [PLTC] on the connecting surface of the first silicon wafer [WA 1 ], said bumps [PLTC] being separated from one another by an even distance which is sufficiently small to cause joinings during the assembly of the two silicon wafers. Said step [PLTS] of depositing the soldering bumps [PLTE] is carried out during the step of depositing the soldering bumps [PLTE] intended for the electrical contacts. The method includes a reflux soldering step [RFX] for assembling the two silicon wafers by melting of the alloy soldering bumps. Application: Protection of semiconductor elements sensitive to the external conditions.

The invention relates to a method for connecting a connecting surface ofa first silicon wafer with a connecting surface of a second siliconwafer so as to form an insulated cavity after assembly, at least one ofthe two silicon wafers including at least one functional area intendedto be within the cavity.

Such a method is known from the patent published under the number U.S.Pat. No. 6,062,461 describing a method for connecting etched siliconwafers by soldering. This method makes it possible to form an insulatedcavity by assembling two silicon wafers on which there are depositedeither a continuous line of soldering material on each silicon wafer ora continuous line on one of the silicon wafers and an extended metalliclayer on the other silicon wafer, and the method then consists ofheating so that, the soldering material melting, the connection betweenthe two silicon wafers is achieved.

The invention relates to the following considerations. In the state ofthe art, it is necessary first of all to deposit a layer on at least onesilicon wafer. In addition a step of producing the continuous line orlines on one of the two silicon wafers requires an additionalmanufacturing step by material deposit, evaporation, printing by mask orion bombardment. This sometimes gives rise to the development ofadditional tools: masks for making an impression etc. This is recognizedas resulting in additional cost.

One aim of the invention is to make it possible to manufacture aninsulated cavity by means of a fast and simple method, that is to sayone which does not require any additional step or additional tools.

In fact a method according to the introductory paragraph ischaracterized according to the invention in that it includes the stepsof:

-   -   depositing bumps of soldering alloy on the connecting surface of        the first silicon wafer, said bumps being separated from each        other by an even distance which is sufficiently small to cause        joins during the assembly of the two silicon wafers, said        deposition of the soldering bumps being carried out during the        step of depositing the soldering bumps intended for the        electrical contacts,    -   reflux soldering in order to assemble the two silicon wafers by        melting the alloy soldering bumps.

Such a method advantageously resolves the problem disclosed above byprofiting from an obligatory step, the deposition of soldering bumpsintended for the electrical contacts, for the manufacture of theinsulated cavity.

In one embodiment of the invention, in the case where the solderingbumps are not joined to each other by the reflux heating, a step ofapplying resin (polymer-based glue for example) on the contour of thecavity is carried out so as to close the cavity. This embodimentresolves a problem sometimes encountered when the soldering bumps arenot joined to each other and the creation of an insulated cavity isnecessary, however.

In a particular embodiment, the two silicon wafers include functionaletchings. This embodiment has the advantage of making it possible tocombine several functionalities sensitive to the external environment onthe same circuit and within the same cavity, thus limiting the number ofcircuit manufacturing steps and the complexity of the circuit obtained.The purpose of such an embodiment is to make it possible to combine, inlittle space and with few steps, at least two functions on the samecircuit.

In an advantageous embodiment, the method includes a step of filling thecavity with an inert gas. The purpose of this embodiment is to give goodinsulation of the components present on the silicon wafers inside thecavity, to allow that said components are well isolated fromcontamination and variations in the external environment. Thus themethod can advantageously be implemented in an enclosure filled with aninert atmosphere.

The invention can therefore be implemented in order to produce anyintegrated circuit where an insulated cavity is advantageous. In one ofits applications, the invention therefore also relates to an integratedcircuit obtained according to the invention. More broadly the inventionrelates to any application where it is wished to attach an integratedcircuit to another one or to a substrate without connection by wire (by“flip chip”). This is particularly advantageous in applications withdiscrete components (for example surface wave filters, BAWs (BulkAcoustic Wave filters), SAWs (Surface Acoustic Wave filters), MEM (MicroElectro-Mechanical) switches etc) in relatively high-frequencyapplications where the connections give rise to parasitic phenomena.These components can advantageously be etched, one on one silicon wafer,the other on the second silicon wafer and therefore combined, accordingto the invention, within the same insulated cavity.

Such applications concern in particular telecommunications, TV tuners,circuits intended for wireless, high-rate transmissions etc.

The integrated circuit obtained by the method according to the inventionis then advantageously assembled (by bonding or flipping) on a metallicgrille and molded in a plastic box. The last step is conventional in theassembly of semiconductor circuits.

More generally, an integrated circuit according to the invention canadvantageously be implemented in an apparatus intended fortelecommunication, including more particularly wireless communication,high-rate transmission etc. The invention therefore relates to acommunication apparatus comprising an antenna, a switch advantageouslyproduced by means of an MEM switch, reception and transmission filters,reception and transmission amplifiers as well as a unit for processingthe signal received. The filters are here advantageously surface wavefilters, for example BAW or SAW filters. The MEMs comprise an electrodewhich is in suspension in air, this electrode often consisting of abimetallic strip. This strip must be placed in an insulating cavitysince this electrode is sensitive. A cavity according to the inventioncan advantageously find an application here. In addition, BAW and SAWfilters require the presence of a cavity for the resonator to function.The double utility of the invention, which makes it possible to combinethe filters with the MEM switch in the same cavity, within the samecircuit assembled by the technique of attaching a silicon wafer toanother with wireless connection, will be understood here.

The invention will be further described with reference to examples ofembodiments shown in the drawings to which, however, the invention isnot restricted.

FIG. 1 depicts a schematic diagram of the method according to theinvention,

FIG. 2 is a plan view of a silicon wafer obtained at an intermediatestep of the method according to the invention,

FIG. 3 depicts an integrated circuit obtained according to theinvention,

FIG. 4 depicts an integrated circuit obtained according to the preferredembodiment of the invention,

FIG. 5 depicts a block diagram of a circuit according to the preferredembodiment of the invention,

FIG. 6 is a functional diagram of a telecommunication apparatusadvantageously using a circuit according to the invention.

The following remarks concern the reference signs. Similar entities aredesignated by a reference by means of identical letters in all theFigures. Several similar entities may appear in a single Figure. In thiscase, a digit or a suffix is added to the reference by letters in orderto distinguish similar entities. The digit or suffix may be omitted forreasons of convenience. This applies to the description and to theclaims.

The following description is presented to enable a person skilled in theart to produce and make use of the invention. This description isprovided in the context of the patent application and its requirements.Various alternatives to the preferred embodiment will be obvious to aperson skilled in the art and the generic principles of the inventiondisclosed here can be applied to other implementations. Thus the presentinvention is not deemed to be limited to the embodiment described butrather to have the widest scope in accordance with the principles andcharacteristics described below.

FIG. 1 shows a schematic diagram of the method according to theinvention. A first silicon wafer WA1 is subjected to an etching stepDES1. Etching here means the implementation of all or some of the knownmethods of manufacturing functional semiconductors. At the end of thisstep, the first silicon wafer comprises at least one functional area DA1which must be protected within an insulated cavity, for example an MEMswitch or a surface wave filter. Advantageously, the functional area DA1is surrounded by a metallic ring produced during previous steps by meansof conventional methods (deposition of a metallic layer, fillingtrenches made in the substrate with metal etc). This optional metallicring then determines more precisely the surface for connection of thesilicon wafer with the second. Typically the functional area alsocomprises metallic areas for producing electrical contacts. Next, a stepof depositing bumps PLTS intended to produce the electrical contacts isperformed. These bumps are deposited on the previously mentionedmetallic areas. This step is carried out conventionally for themanufacture of circuits produced by turning an integrated circuit overon another without connection by wire. The electrical contacts are thenmade when the second silicon wafer is turned over on the previous one atthe electrical contact bumps situated at the required places. During thestep of depositing bumps PLTS, additional bumps not intended for theelectrical contacts are then deposited according to the invention on theconnection surface surrounding the functional area DA1. If theconnecting surface is a metallic ring then the bumps are deposited onthis metallic ring. A silicon wafer WAE ready to be assembled in areflux soldering step RFX on a second silicon wafer WA2 is thenobtained.

FIG. 2 is a plan view of a silicon wafer WAE obtained after this stepPLTS of depositing the bumps. It therefore comprises in particular afunctional area DA1 and can also comprise various other circuit areas:for example an inductor IND, another functional circuit portion MC etc.The bumps consist of material able to melt at the conventional refluxsoldering temperatures used for flip-chip techniques. Thusconventionally the materials used are bumps formed by a tin-lead alloy(“solder bumps”) or a gold alloy (“gold bumps”). The bumps deposited inthe step PLTS are either electrical contact bumps PLTE or additionalbumps PLTC intended to contribute to the formation of an insulatedcavity for surrounding the functional area DA1. For example, the size ofthe tin-lead alloy bumps is generally, with current technologies, around120 microns in diameter. The bumps PLTC intended to form the cavity willthen advantageously be placed at a distance of approximately 60 micronsfrom each other. These indicative dimensions make it possible to obtaina cavity with a size compatible with the elements conventionallyimplemented on the functional area or areas within a cavity. On theother hand, the bumps PLTS intended for the electrical contacts areconventionally spaced further apart so as to prevent their touchingafter the reflux soldering step. The dimensions given here are onlyindicative in the light of current technologies. This does not excludetechnology one day making it possible to produce smaller bumps andnevertheless to produce an insulated cavity according to the principleof the invention. Overall, the ratio between the size of the bumps andthe space between the bumps can be between {fraction (1/10)} and 1according to the size of the bumps and the spreading capability of thematerial of which they consist. Advantageously, it has been seen thatthe functional area was, optionally, surrounded by a metallic ring MRshown in dotted lines in the Figure. In this case, the bumps PLTC arethen deposited on this metallic ring. This makes it possible to ensurebetter adhesion and reliability of the interface.

Next, referring again to FIG. 1, a reflux soldering step RFX is carriedout. The purpose of the reflux soldering is to produce the contact withthe second silicon wafer WA2. Prior to the soldering step RFX proper,the second silicon wafer WA2 is placed in contact with the solderingbumps. During the soldering step RFX, the assembly is heated to atemperature which makes the alloy melt. For example, with the materialsmentioned above, the temperature will be approximately 100° C. It isadvantageously below 110° C. in order not to damage the etchedfunctional surfaces. The electrical and adhesion contacts are thusprovided between the two silicon wafers WA1 and WA2. The seal isprovided by the melting of the bumps, which join together to form a wallwhich, when the bumps are in accordance with the dimensions mentionedpreviously, will have a width of approximately 120 microns and a heightof approximately 60 microns. The second silicon wafer WA2 may or not maynot have been etched in an optional etching step DES2 and consequentlyinclude or not functional areas DA2. Optionally, it advantageously has aring around the area which will be within the insulated cavity in orderto provide good adhesion and reliability of the interface in parallel ofthe first silicon wafer which advantageously also has a metallic ringaround the functional area to be placed within the cavity. This ring canbe produced with etching or without etching, by simple deposition.

It should also be noted that here there is described a method in which afirst silicon wafer WA1 comprises a functional area DA1, the depositionof the contact bumps being effected on this wafer WA1, but that themethod according to the invention can also be implemented using a waferon which there is no etching but on which there is only carried out thedeposition of the soldering bumps, the etched area being included on thesecond silicon wafer. Although less advantageous, this embodiment can beenvisaged according to the invention. FIG. 2 is therefore onlyindicative of an intermediate result of a special embodiment.

According to one advantageous embodiment, the reflux soldering step RFXis carried out with filling of the cavity with an inert gas. Thisfilling can advantageously be carried out during the reflux soldering,which is then carried out in air or in an inert atmosphere. In this casethe soldering, by connecting the bumps together, traps the air or inertgas.

After the reflux soldering step RFX, alternatively a resin, for examplea glue, a polymer-based resin etc can be used for partial filling at theperiphery of the cavity between the two silicon wafers. The propagationof the resin is limited by the network of bumps. In addition, the resinmakes it possible to ensure the impermeability of the cavity where thebumps are not well connected to one another. The fact of adding thisfilling step with resin does not significantly change the size of thewall obtained around the cavity. This step can be carried out routinelyin a method of connecting two silicon wafers or be carried out solely ifunjoined bumps are detected.

FIG. 3 depicts an integrated circuit CPC obtained according to theinvention. This Figure is merely indicative of a particular embodimentin which the two silicon wafers WA1 and WA2 are etched. More precisely,on the first silicon wafer WA1 there is etched a switch MEM in an activearea DA1. On the second silicon wafer WA2 there is etched a resonatorfilter BAW in an active area DA2. The functioning of these areas andtheir insertion in a functional circuit are guaranteed by the presenceof electrical contacts between areas are provided by virtue of the bumpsof soldering material PLTE. These bumps are deposited during a bumpdeposition step conventionally used in the methods of generatingcircuits by turning over a silicon wafer on another without connectionby wire. Under each of the bumps PLTE intended for the electricalcontacts deposited, a metallic area MTDE is present. Advantageously, incontact with these areas MTDE and as required, contacts CCT are providedwith components external to the active areas DA1 and DA2. For example,these contacts are hollowed out in the silicon wafer WA1 during theetching step DES prior to the assembly of the two silicon wafers.Advantageously, a metallic material is also deposited under the bumpsPLTC intended to form the cavity. This metallic area takes the form of ametallic ring MTDC surrounding the active areas DA1 and DA2.

In a preferred embodiment, referring to FIG. 1, a final assembly stepSTK is carried out. This step consists preferentially of assembling bysoldering the circuit CPC consisting of at least the two silicon waferson a metallic grille MTL and then molding on the assembly in a plasticcan PST. The soldering is for example carried out using bumps PLT whichmay have been deposited on the silicon wafer WA1 during the bumpdeposition step PLTS previously described. It can be seen, in FIG. 4,that the final circuit FC, obtained in the preferred embodiment of theinvention, contains not only the circuit CPC but also other circuitportions OPC which may or may not contain insulating cavities. Thus acomplete functional circuit is contained on the final circuit FC. Anexample of a complete functional circuit will now be described.

FIG. 5 depicts a block diagram of a circuit FC according to thepreferred embodiment of the invention. According to the preferredembodiment of the invention, the circuit consisting of two siliconwafers comprises at least one cavity in which there are placed an MEMswitch and a BAW or SAW filter. Such an implementation is moreoverpresented as an example in FIG. 3, where DA1 represents moreparticularly an MEM switch with a bimetallic strip and DA2 representsmore particularly a BAW filter. These elements can for exampleadvantageously be used within a circuit FCS as shown schematically inFIG. 5. This circuit consists of a reception chain for the receivedsignals RX and a transmission chain for the transmitted signals TX witha switch COM connected to a reception/transmission line, for example anantenna ANT. The reception and transmission chains each include at leastone filter, respectively FIR and FIT, which are each connected toamplifiers, respectively RA and TA. The filters FIR and FIT and theswitch COM are advantageously BAW or SAW filters and an MEM switch usedin a cavity according to the invention. Such a circuit FCS isadvantageously used in a telecommunication apparatus intended forreceiving and transmitting signals as shown in FIG. 6. Thistelecommunication apparatus advantageously uses a circuit FCS accordingto the preferred embodiment of the invention. It also comprises at leastone antenna ANT, amplifiers RA and TA which can advantageously beintegrated on the first or second silicon wafer of the circuit accordingto the invention, and finally signal processing means MC which can alsoadvantageously be integrated on one of the two silicon wafers used forproducing the circuit according to the invention, or even on both.

Although this invention has been described in accordance with theembodiments presented, a person skilled in the art will immediatelyrecognize that there exist variants to the embodiments presented andthat these variants remain within the spirit and scope of the presentinvention. Thus many modifications can be made by a person skilled inthe art without for all that being excluded from the spirit and scopedefined by the following claims.

1. A method for connecting a connecting surface of a first silicon waferwith a connecting surface of a second silicon wafer so as to form aninsulated cavity after assembly, at least one of the two silicon wafersincluding at least one functional area intended to be within the cavity,said method being characterized in that it includes the steps of:depositing alloy soldering bumps on the connecting surface of the firstsilicon wafer, the said bumps being separated from one another by aneven distance which is sufficiently small to cause joinings during theassembly of the two silicon wafers, the said deposition of the solderingbumps being carried out during the step of depositing the solderingbumps intended for the electrical contacts, reflux soldering in order toconnect the two silicon wafers by melting of the alloy soldering bumps.2. A method as claimed in claim 1, also including a step of applying aresin to the contour of the cavity.
 3. A method as claimed in claim 1,for which the two silicon wafers include functional etchings.
 4. Amethod as claimed in claim 1, characterized in that it includes a stepof filling the cavity with an inert gas.
 5. A method as claimed in claim1, characterized in that it is implemented within an enclosure filledwith an inert atmosphere.
 6. An integrated circuit characterized in thatit includes at least one insulated cavity produced according to a methodas described in claim
 1. 7. An apparatus intended to receive andtransmit communication signals comprising at least one antenna,reception and transmission amplifiers, and a unit for processing thereceived and transmitted signals, said apparatus being characterized inthat it includes at least one circuit as claimed in claim
 6. 8. Anapparatus intended to receive and transmit communication signals asclaimed in claim 7, also including at least one switch for switchingbetween two processing chains for the signals received and the signalstransmitted and at least one filter intended to filter the received ortransmitted signals, said switch and said filter being placed within theinsulated cavity.